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The AT25F4096 is enabled through the Chip Select pin (CS) and accessed via a 3-wire
interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock
(SCK). All write cycles are completely self-timed.
Block Write protection for top 1/8, top 1/4, top 1/2 or the entire memory array is enabled
by programming the status register. Separate write enable and write disable instructions
are provided for additional data protection. Hardware data protection is provided v ia the
WP pin to protect against inadvertent write attempts to the status register. The HOLD
pin may be used to suspend any serial communication without resetting the serial
sequence.
Absolute Maximum Ratings*
Operating Temperature.................................... –40 ° C to +85 ° C
Storage Temperature ..................................... –65 ° C to +150 ° C
Voltage on Any Pin
with Respect to Ground .................................... –1.0V to +5.0V
Maximum Operating Voltage ............................................ 4.2V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
DC Output Current........................................................ 5.0 mA
Figure 1. Block Diagram
524,288 x 8
2
AT25F4096
2454G–SFLSH–5/06
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